Description

(a) Please describe what is an overflow under the context of addition and subtraction,what is the cause of it, and why it is an issue that we need to deal with.
1. Adding two positive integers
– In these cases, the computer can detect overflow by examining the most signif-icant bit of the operation’s result. In this case of adding two positive numbers, if there is overflow, the most significant bit will be 1, signifying that the number is negative. If we are adding two positive numbers, the result should be positive hence, if the result is negative, there must have been overflow.
2. Adding two negative integers
– Similar to the case of adding two positive numbers, if we add two negativenumbers and the result is positive, most significant bit is 0, overflow must have occurred.
3. Subtracting a positive integer from a negative integer
– This case is operationally the same as adding two negative numbers. Theexpected behavior of adding two negative numbers will be a negative number and if the result is a positive number, overflow has occurred.
4. Subtracting a negative integer from a positive integer
– This case will be the same as adding together two positive integers. Theresult of the operation is expected to be positive, if the result is negative, overflow has occurred.
(c) In what scenario’s would there be no overflows? Please discuss one scenario for addition, one scenario for subtraction, and explain why.
For the case of addition, when we add together numbers of different signs, there is no chance of overflow. If the numbers have different signs, the result will always tend towards zero for any two combination of numbers. There is no way for the resulted number to be greater than the positive integer since there is a negative number being added to it, and the opposite is true for the negative integer. For this reason, there is no chance for the result to be greater than the number of bits required to represent each of the operands.
In the case of subtraction, there is no overflow when adding together numbers of the same sign. Since subtracting numbers of the same sign is equivalent to adding numbers with opposite signs, the result of the operation will always be less than the positive operand and greater than the negative operand. This leaves no way for the result to not be able to be represented with the given number of bits.
Problem 2
(a) Multiplication: If the multiplicand is in register x28, the multiplier is in register x29,and we would like the multiplication result to be in register x8 (higher 32 bits) and x9 (lower 32 bits). Please write the RISC-V instructions for multiplications in the following cases and explain what each line of code does using comments.
1. The values of x28 and x29 are both signed integersmul x9, x28, x29 // x28 times x29 and place lower 32 bits in x9 mulh x8, x28, x29 // x28 times x29 and place upper 32 bits in x8
2. The values of x28 and x29 are both unsigned integersmul x9, x28, x29 // x28 times x29 and place lower 32 bits in x9 mulhu x8, x28, x29 // x28 times x29 and place upper 32 bits in x8
3. The value of x28 is a signed integer and the value of x29 is an unsigned integermul x9, x28, x29 // x28 times x29 and place lower 32 bits in x9 mulhsu x8, x28, x29 // x28 times x29 and place upper 32 bits in x8
(b) Division: If the dividend is in the register x28, the divisor is in register x29, and wewould like to have the quotient in x8 and the remainder in x9. Please write the RISC-V instructions for division in the following cases and explain what each line of code does using comments.
1. The values of x28 and x29 are both signed integersdiv x8, x28, x29 // x28 divided by x29 and place quotient in x8 rem x9, x28, x29 // x28 divided by x29 and place remainder in x9
2. The values of x28 and x29 are both unsigned integersdivu x8, x28, x29 // x28 divided by x29 and place quotient in x8 remu x9, x28, x29 // x28 divided by x29 and place remainder in x9
Problem 3
(a) Please represent the number −1.2356 × 108 using the 32-bit RISC-V format.
Using a converter to convert the number to binary and using the convention to write the number in normalized form we get,
(−1)1 × 1.11010111010110000001000000 × 226
Sign bit: 1
Exponent: 26 + 127 = 153 = (10011001)2
Fraction: 11010111010110000001000
Writing this in the RISC-V format we get,
11001100111010111010110000001000
(b) What is the range, lower bound and upper bound, of floating-point numbers that the 32-bit RISC-V format can represent? What problems will be caused if the floatingpoint number we want to represent goes below the lower bound or above the upper bound? What would be a solution to such problems?
Since there are two reserved values for the exponent, 11111111 and 00000000, the lower bound will be where the exponent is (00000001)2 − (127)10 = (−126)10 and the fraction is 23 bits of zero. This will result in a lower bound of ±1.0×2−126 ≈±1.2×10−38. The upper bound would be the same except this time the exponent will be the largest it can possibly be, 11111110. In this case, the actual exponent will be (11111110)2 − (127)10 = (127)10. The largest fractional value we can have is 23 bits of one which makes the upper bound, ±2.0 × 2127 ≈±3.4 × 1038.
As with overflow in general, if the result exceeds the upper/lower bounds, the number will be incorrectly represented within the program and this can lead to future calculations which rely on the number to be thrown off as well. The solution would be to use a higher precision representation since double precision can represent a far more expansive range than single precision.