Description

(2) Please use the SPICE model on page 3 for simulation and calculation.

1. [MOSFET DC Biasing, 60%] Use the drain current equations below.
Don’t consider channel-length modulation and body effect. Assuming Wdrawn / Ldrawn = 20 µm / 2 µm, sketch IX of M1 as a function of VX increasing from 0 V to VDD = 5 V. (Note: finish this part before the midterm exam)
(NMOS in triode region)
(NMOS in saturation region)
(PMOS in triode region)
(PMOS in saturation region)

2. [MOSFET Small-Signal Model] Assume Wdrawn / Ldrawn = 20 µm / 2 µm. (a) [20%] Use Pspice to plot the drain current of a NMOS as a function of VDS increasing from 0 V to 5 V, at VGS = 1 V, 1.5 V and 2 V. Label the off, triode and saturation regions for each curve. Derive ro from each curve in the saturation region and compare it with hand-calculation result. (b) [20%] Use Pspice to plot the drain current of a NMOS as a function of VGS increasing from 0 V to 3 V, at VDS = 5 V. Derive gm from the curve when VGS = 2 V and compare it with hand-calculation result.

Vacuum permittivity (𝛜𝐨) = 𝟖. 𝟖𝟓 × 𝟏𝟎−𝟏𝟐 (F / m)
Silicon oxide dielectric constant (𝛜𝐫) = 𝟑. 𝟗