Description

(2) Please use the SPICE model in page 3 for simulation and calculation.

1. [Common-Source with Resistive Load + Source Follower]
(a) [50%] Assume λ = 0 and γ = 0. For VDD = 5 V, VIN = 1 V, Vb = 1 V,
(Wdrawn/Ldrawn)1 = 50 µm / 2 µm, (Wdrawn/Ldrawn)2 = (Wdrawn/Ldrawn)3 = 20 µm / 2 µm, RD = 10 kΩ and RL = 2 kΩ, what is the voltage gain Av for each circuit below? Does the voltage gain drop significantly after adding a small resistive load (RL) and then recover after adding a source follower (M2 and M3) as a buffer?
(b) [25%] For each circuit below, using the design and biasing condition in (a), plot Vout and Av as a function of Vin (from 0 V to 5 V) in Pspice. Compare the hand-calculation results in (a) with the simulation results here.
(c) [25%] For circuit (iii), using the design and biasing conditions in (a), plot Vout as a function of time (from 0 to 0.1 second) in Pspice, when Vin = 1 + A × sin(2π100t) (V) and A = 0.01 V, 0.1 V and 1 V. What do you observe when the amplitude increases?

Vacuum permittivity (𝛜𝐨) = 𝟖. 𝟖𝟓 × 𝟏𝟎−𝟏𝟐 (F / m)
Silicon oxide dielectric constant (𝛜𝐫) = 𝟑. 𝟗